TC-X, IA-32 Back End¶
TC-X is an additional assignment.
This section has been updated for EPITA-2023 on 2021-06-06.
At the end of this stage, the compiler produces IA-32 code (possibly with infinite registers). Basically, this stage is TC-7, Instruction Selection with the IA-32 assembly language instead of MIPS.
The IA-32 architecture is the 32-bit Intel Architecture defined for the Intel 80306 (i386) processors, an extension of the original 16-bit 8086 (x86) architecture. IA-32 may also be referenced as x86, i386 and sometimes x86-32 or even x32, to distinguish it from the original 16-bit (“x86-16”) or the 64-bit (x86-64 or x64) variants of the x86 family.
Relevant lecture notes include 47-instruction-selection.pdf.